A Software Tool for 3D Meshing of VLSI Interconnect Structures
نویسندگان
چکیده
Due to decreasing dimensions and increasing signalfrequencies, the study of on-chip parasitic effects has become of basic importance. In order to accurately predict the behavior of a VLSI design, it is nowadays necessary to use tools capable of performing detailed field-calculations. A primary requirement for such computations is that the domain is decomposed into a mesh. This paper describes the design and implementation of a software tool capable of generating fully three-dimensional meshes from VLSI layout information. The main features of the tool are that the basic elements are tetrahedral, the generated elements satisfy a predetermined quality condition, and the meshes exhibit good grading.
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